[獲獎] 恭喜 王昱翔、葉羽剛 學長 榮登 2025年 VLSI-TSA

Y.-H. Wang, Y.-G. Yeh, and T.-H. Lin, “An 84.8-dB SNDR 62.5-kHz Bandwidth 2nd-order Noise-Shaping SAR ADC with a Duty-Cycled OTA Sharing Technique,” IEEE VLSI-TSA, Apr. 2025.